Electrostatic discharge (ESD) events are a common part of everyday life and some of the larger discharges are detectable by the human senses. Smaller discharges go unnoticed by human senses because the ratio of discharge strength to surface area over which the discharge occurs is very small.
Integrated circuits (ICs) have been shrinking at an incredible rate over past decades. As transistors shrink in size, the supporting components around transistors generally shrink as well. The shrinking of IC dimensions decreases the ESD tolerance of transistors thereby increasing the sensitivity of integrated circuits to ESD stress.
An ESD event occurs when an object at a first potential comes near or into contact with an object at a second potential. Rapid transfer of charge from the first object to the second object occurs such that the two objects are at approximately equal potential. Where the object with lower charge is an IC, the discharge attempts to find the path of least resistance through the IC to a ground. Often, this path flows through interconnects. Any part of this path that is unable to withstand the energy associated with the discharge sustains damage.
Conventionally, ESD protection structures based upon diodes are built into the IC for protection. These structures are complicated to ensure high voltage protection and fast response times. Because of the complexity, a considerable amount of area (tens to thousands of square microns for each ESD protection structure) of an IC is consumed by ESD protection structures that could otherwise be used for active circuitry. To meet increasing demand in ICs for smaller form factors, the ESD protection circuit size should be reduced.
Thus, there is a need for an ESD protection consuming smaller IC area.